20UPGFC0145974 Chip Configuration

Stage: MODULE/FINAL_COLD

Branch: LP

Config: 6a2a06544a7e8678e2bbb6aa

This Revision: 6a2a080d4a7e8678e2bbb6db

Latest Revision: 6a2a080d4a7e8678e2bbb6db

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	7
SldoTrimD	7

Parameter

ADCcalPar	3.217 0.184 10000.0
InjCap	7.807999999999999
KSenseInA	21323.341
KSenseInD	21352.14
Name	0x23a36
ChipId	13
NfDSLDO	1.2584621618382903
NfASLDO	1.2587907010117647
NfACB	1.2574336913821962
VcalPar	14.876 0.198
IrefTrim	10

KSenseShuntA	21933.0
KSenseShuntD	21962.0
KShuntA	1014.326
KShuntD	981.774

PixelConfig

Diff from previous revision 6a2a06544a7e8678e2bbb6ab

No diff is present.