20UPGFC0145972 Chip Configuration

Stage: MODULE/FINAL_COLD

Branch: LP

Config: 6a2a06504a7e8678e2bbb69c

This Revision: 6a2a08094a7e8678e2bbb6d1

Latest Revision: 6a2a08094a7e8678e2bbb6d1

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	2
DataMergeOutMux1	3
DataMergeOutMux2	0
DataMergeOutMux3	1
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	1
SerSelOut3	3
SldoTrimA	6
SldoTrimD	6

Parameter

ADCcalPar	3.682 0.187 10000.0
InjCap	7.8100000000000005
KSenseInA	21632.077
KSenseInD	21983.363
Name	0x23a34
ChipId	12
NfDSLDO	1.258647857892863
NfASLDO	1.2588335539474353
NfACB	1.257490828629757
VcalPar	12.092 0.2
IrefTrim	12

KSenseShuntA	22250.0
KSenseShuntD	22611.0
KShuntA	1003.933
KShuntD	990.086

PixelConfig

Diff from previous revision 6a2a06504a7e8678e2bbb69d

No diff is present.