20UPGFC0141722 Chip Configuration

Stage: MODULE/FINAL_COLD

Branch: cold

Config: 6a2a05584a7e8678e2bbb64e

This Revision: 6a2a06ef2da0f186923e11e7

Latest Revision: 6a2a53bb8bffcb2fcfc1e9bc

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535

EnCoreCol3	63
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	8
SldoTrimD	8

Parameter

ADCcalPar	4.957 0.19 10000.0
InjCap	7.686000000000001
KSenseInA	21134.913
KSenseInD	21446.654
Name	0x2299a
ChipId	15
NfDSLDO	1.2629717939282172
NfASLDO	1.2637859969915861
NfACB	1.2618576213151855
VcalPar	13.365 0.203
IrefTrim	11

KSenseShuntA	21739.0
KSenseShuntD	22059.0
KShuntA	1004.329
KShuntD	997.911

PixelConfig

Diff from previous revision 6a2a05584a7e8678e2bbb64f

No diff is present.