20UPGFC0146025 Chip Configuration

Stage: MODULE/FINAL_WARM

Branch: LP

Config: 6a28937a382a2f15c9189945

This Revision: 6a28c53566f3d07de10176d4

Latest Revision: 6a28c53566f3d07de10176d4

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3
DataMergeOutMux3	0
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	3
SerSelOut3	1
SldoTrimA	10
SldoTrimD	8

Parameter

ADCcalPar	0.001 0.185 10000.0
InjCap	7.68
KSenseInA	20878.679
KSenseInD	21480.11
Name	0x23a69
ChipId	14
NfDSLDO	1.2610190536666355
NfASLDO	1.2611476124736474
NfACB	1.2591906617446902
VcalPar	15.516 0.198
IrefTrim	5

KSenseShuntA	21475.0
KSenseShuntD	22094.0
KShuntA	1020.636
KShuntD	996.253

PixelConfig

Diff from previous revision 6a28a3f61b95443ad3794c10

No diff is present.