20UPGFC0141593 Chip Configuration

Stage: MODULE/FINAL_WARM

Branch: LP

Config: 6a289353e4d82762eb8e9575

This Revision: 6a28c90066f3d07de10177b0

Latest Revision: 6a28c90066f3d07de10177b0

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	8
SldoTrimD	7

Parameter

ADCcalPar	2.746 0.183 10000.0
InjCap	8.091
KSenseInA	21347.992
KSenseInD	21308.628
Name	0x22919
ChipId	13
NfDSLDO	1.2547977254548548
NfASLDO	1.2560976195046527
NfACB	1.2538692297049994
VcalPar	13.115 0.197
IrefTrim	10

KSenseShuntA	21958.0
KSenseShuntD	21917.0
KShuntA	983.211
KShuntD	972.532

PixelConfig

Diff from previous revision 6a289353e4d82762eb8e9576

No diff is present.