20UPGFC0146103 Chip Configuration

Stage: MODULE/FINAL_WARM

Branch: LP

Config: 6a2891f91b95443ad3794b94

This Revision: 6a2891f91b95443ad3794b95

Latest Revision: 6a28c6f466f3d07de1017737

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	13
SldoTrimD	12

Parameter

ADCcalPar	6.75 0.166 10000.0
InjCap	7.655
KSenseInA	21488.18
KSenseInD	22002.575
Name	0x23ab7
ChipId	15
NfDSLDO	1.257276563951404
NfASLDO	1.258162191288596
NfACB	1.2561623876239687
VcalPar	16.302 0.181
IrefTrim	6

KSenseShuntA	22102.0
KSenseShuntD	22631.0
KShuntA	1012.726
KShuntD	992.356

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	13
SldoTrimD	12

Parameter

ADCcalPar	6.75 0.166 10000.0
InjCap	7.655
KSenseInA	21488.18
KSenseInD	22002.575
Name	0x23ab7
ChipId	15
NfDSLDO	1.257276563951404
NfASLDO	1.258162191288596
NfACB	1.2561623876239687
VcalPar	16.302 0.181
IrefTrim	6
KSenseShuntA	22102.0
KSenseShuntD	22631.0
KShuntA	1012.726
KShuntD	992.356