20UPGFC0145956 Chip Configuration

Stage: MODULE/FINAL_WARM

Branch: LP

Config: 6a2891e01b95443ad3794b6d

This Revision: 6a2891e01b95443ad3794b6e

Latest Revision: 6a28c88666f3d07de101778e

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	2
DataMergeOutMux1	3
DataMergeOutMux2	0
DataMergeOutMux3	1
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	1
SerSelOut3	3
SldoTrimA	9
SldoTrimD	10

Parameter

ADCcalPar	6.266 0.189 10000.0
InjCap	8.479
KSenseInA	21182.206
KSenseInD	21629.595
Name	0x23a24
ChipId	12
NfDSLDO	1.252603837360154
NfASLDO	1.2536894559214427
NfACB	1.251275383068051
VcalPar	12.353 0.204
IrefTrim	9

KSenseShuntA	21787.0
KSenseShuntD	22248.0
KShuntA	1008.881
KShuntD	987.91

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	2
DataMergeOutMux1	3
DataMergeOutMux2	0
DataMergeOutMux3	1
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	1
SerSelOut3	3
SldoTrimA	9
SldoTrimD	10

Parameter

ADCcalPar	6.266 0.189 10000.0
InjCap	8.479
KSenseInA	21182.206
KSenseInD	21629.595
Name	0x23a24
ChipId	12
NfDSLDO	1.252603837360154
NfASLDO	1.2536894559214427
NfACB	1.251275383068051
VcalPar	12.353 0.204
IrefTrim	9
KSenseShuntA	21787.0
KSenseShuntD	22248.0
KShuntA	1008.881
KShuntD	987.91