20UPGFC0146119 Chip Configuration

Stage: MODULE/FINAL_WARM

Branch: cold

Config: 6a2890f73b97c76890e923c0

This Revision: 6a2890f73b97c76890e923c1

Latest Revision: 6a2890f73b97c76890e923c1

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA7
SldoTrimD7

Parameter

ADCcalPar
  • -1.0
  • 0.189
  • 10000.0
InjCap7.876000000000001
KSenseInA20981.614
KSenseInD21312.545
Name0x23ac7
ChipId15
NfDSLDO1.258770525310543
NfASLDO1.2592561951530405
NfACB1.2580991581753258
VcalPar
  • 13.48
  • 0.201
IrefTrim7
KSenseShuntA21581.0
KSenseShuntD21921.0
KShuntA1002.724
KShuntD991.285

PixelConfig

Diff from previous revision None

ITKPIXV2
GlobalConfig
AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA7
SldoTrimD7
Parameter
ADCcalPar
  • -1.0
  • 0.189
  • 10000.0
InjCap7.876000000000001
KSenseInA20981.614
KSenseInD21312.545
Name0x23ac7
ChipId15
NfDSLDO1.258770525310543
NfASLDO1.2592561951530405
NfACB1.2580991581753258
VcalPar
  • 13.48
  • 0.201
IrefTrim7
KSenseShuntA21581.0
KSenseShuntD21921.0
KShuntA1002.724
KShuntD991.285