20UPGFC0145974 Chip Configuration

Stage: MODULE/FINAL_WARM

Branch: cold

Config: 6a2890f13b97c76890e923a6

This Revision: 6a2890f13b97c76890e923a7

Latest Revision: 6a2890f13b97c76890e923a7

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA7
SldoTrimD7

Parameter

ADCcalPar
  • 3.217
  • 0.184
  • 10000.0
InjCap7.807999999999999
KSenseInA21323.341
KSenseInD21352.14
Name0x23a36
ChipId13
NfDSLDO1.2584621618382903
NfASLDO1.2587907010117647
NfACB1.2574336913821962
VcalPar
  • 14.876
  • 0.198
IrefTrim10
KSenseShuntA21933.0
KSenseShuntD21962.0
KShuntA1014.326
KShuntD981.774

PixelConfig

Diff from previous revision None

ITKPIXV2
GlobalConfig
AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA7
SldoTrimD7
Parameter
ADCcalPar
  • 3.217
  • 0.184
  • 10000.0
InjCap7.807999999999999
KSenseInA21323.341
KSenseInD21352.14
Name0x23a36
ChipId13
NfDSLDO1.2584621618382903
NfASLDO1.2587907010117647
NfACB1.2574336913821962
VcalPar
  • 14.876
  • 0.198
IrefTrim10
KSenseShuntA21933.0
KSenseShuntD21962.0
KShuntA1014.326
KShuntD981.774