20UPGFC0142116 Chip Configuration

Stage: MODULE/FINAL_WARM

Branch: warm

Config: 6a273e284a860f225860af19

This Revision: 6a274eef4a860f225860af8e

Latest Revision: 6a2a161694c0ee9129c5d069

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux02
DataMergeOutMux13
DataMergeOutMux20
DataMergeOutMux31
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut21
SerSelOut33
SldoTrimA9
SldoTrimD9

Parameter

ADCcalPar
  • 10.0
  • 0.18
  • 10000.0
InjCap7.46
KSenseInA21160.459
KSenseInD21504.874
Name0x22b24
ChipId12
NfDSLDO1.2438926231181187
NfASLDO1.243921192408605
NfACB1.242364166077114
VcalPar
  • -3.0
  • 0.19
IrefTrim6
KSenseShuntA21765.0
KSenseShuntD22119.0
KShuntA1014.579
KShuntD985.635

PixelConfig

Diff from previous revision 6a27447db35bacd1a5e483e0

No diff is present.