20UPGFC0146105 Chip Configuration

Stage: MODULE/QC_CROSSCHECK

Branch: LP

Config: 6a1f3b785c5bb5e61077f036

This Revision: 6a21f5453414dfb500e52806

Latest Revision: 6a21f5453414dfb500e52806

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3
DataMergeOutMux3	0
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	3
SerSelOut3	1
SldoTrimA	7
SldoTrimD	8

Parameter

ADCcalPar	-1.0 0.198 10000.0
InjCap	7.611
KSenseInA	20848.788
KSenseInD	21673.118
Name	0x23ab9
ChipId	14
NfDSLDO	1.2584193089026197
NfASLDO	1.2594620636706044
NfACB	1.2580479167934746
VcalPar	14.765 0.211
IrefTrim	12

KSenseShuntA	21444.0
KSenseShuntD	22292.0
KShuntA	995.221
KShuntD	1013.295

PixelConfig

Diff from previous revision 6a1f3b785c5bb5e61077f037

No diff is present.