20UPGFC0146103 Chip Configuration

Stage: MODULE/QC_CROSSCHECK

Branch: LP

Config: 6a1f3b663728ff7b0658296d

This Revision: 6a20a1aa785945eeb4dad6e4

Latest Revision: 6a21f5caae36c5cf13f73d64

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA13
SldoTrimD12

Parameter

ADCcalPar
  • 6.75
  • 0.166
  • 10000.0
InjCap7.655
KSenseInA21488.18
KSenseInD22002.575
Name0x23ab7
ChipId15
NfDSLDO1.257276563951404
NfASLDO1.258162191288596
NfACB1.2561623876239687
VcalPar
  • 16.302
  • 0.181
IrefTrim6
KSenseShuntA22102.0
KSenseShuntD22631.0
KShuntA1012.726
KShuntD992.356

PixelConfig

Diff from previous revision 6a1f3b663728ff7b0658296e

No diff is present.