20UPGFC0223193 Chip Configuration

Stage: MODULE/POST_PARYLENE_COLD

Branch: cold

Config: 6a15ea3308544d4de2d955ed

This Revision: 6a15ea3308544d4de2d955ee

Latest Revision: 6a15ea3308544d4de2d955ee

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA10
SldoTrimD10

Parameter

ADCcalPar
  • 0.089
  • 0.185
  • 10000.0
InjCap7.5
KSenseInA20648.292
KSenseInD21680.93
Name0x367d9
ChipId15
NfDSLDO1.2542935845990764
NfASLDO1.2547221196703449
NfACB1.2535793594802946
VcalPar
  • 11.449
  • 0.197
IrefTrim10
KSenseShuntA21238.0
KSenseShuntD22300.0
KShuntA1007.007
KShuntD974.141

PixelConfig

Diff from previous revision None

ITKPIXV2
GlobalConfig
AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA10
SldoTrimD10
Parameter
ADCcalPar
  • 0.089
  • 0.185
  • 10000.0
InjCap7.5
KSenseInA20648.292
KSenseInD21680.93
Name0x367d9
ChipId15
NfDSLDO1.2542935845990764
NfASLDO1.2547221196703449
NfACB1.2535793594802946
VcalPar
  • 11.449
  • 0.197
IrefTrim10
KSenseShuntA21238.0
KSenseShuntD22300.0
KShuntA1007.007
KShuntD974.141