20UPGFC0223192 Chip Configuration

Stage: MODULE/POST_PARYLENE_COLD

Branch: cold

Config: 6a15ea2c08544d4de2d955d3

This Revision: 6a15ea2c08544d4de2d955d4

Latest Revision: 6a15ea2c08544d4de2d955d4

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535

EnCoreCol3	63
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	7
SldoTrimD	4

Parameter

ADCcalPar	-1.0 0.189 10000.0
InjCap	7.5
KSenseInA	20975.476
KSenseInD	21277.408
Name	0x367d8
ChipId	13
NfDSLDO	1.2538120915050082
NfASLDO	1.2549405709548325
NfACB	1.2532549940550948
VcalPar	11.621 0.203
IrefTrim	9

KSenseShuntA	21575.0
KSenseShuntD	21885.0
KShuntA	997.444
KShuntD	959.164

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	7
SldoTrimD	4

Parameter

ADCcalPar	-1.0 0.189 10000.0
InjCap	7.5
KSenseInA	20975.476
KSenseInD	21277.408
Name	0x367d8
ChipId	13
NfDSLDO	1.2538120915050082
NfASLDO	1.2549405709548325
NfACB	1.2532549940550948
VcalPar	11.621 0.203
IrefTrim	9
KSenseShuntA	21575.0
KSenseShuntD	21885.0
KShuntA	997.444
KShuntD	959.164