20UPGFC0222565 Chip Configuration

Stage: MODULE/POST_PARYLENE_WARM

Branch: cold

Config: 6a15e9b2bf590b6a4c3d7121

This Revision: 6a15e9b2bf590b6a4c3d7122

Latest Revision: 6a15e9b2bf590b6a4c3d7122

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535

EnCoreCol3	63
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	9
SldoTrimD	9

Parameter

ADCcalPar	0.22 0.187 10000.0
InjCap	7.5
KSenseInA	21473.264
KSenseInD	21373.784
Name	0x36565
ChipId	15
NfDSLDO	1.256979071045694
NfASLDO	1.2578647101929832
NfACB	1.2563505529411667
VcalPar	12.035 0.199
IrefTrim	14

KSenseShuntA	22087.0
KSenseShuntD	21984.0
KShuntA	984.149
KShuntD	984.143

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	9
SldoTrimD	9

Parameter

ADCcalPar	0.22 0.187 10000.0
InjCap	7.5
KSenseInA	21473.264
KSenseInD	21373.784
Name	0x36565
ChipId	15
NfDSLDO	1.256979071045694
NfASLDO	1.2578647101929832
NfACB	1.2563505529411667
VcalPar	12.035 0.199
IrefTrim	14
KSenseShuntA	22087.0
KSenseShuntD	21984.0
KShuntA	984.149
KShuntD	984.143