20UPGFC0222566 Chip Configuration

Stage: MODULE/POST_PARYLENE_WARM

Branch: LP

Config: 6a15e9afbf590b6a4c3d7116

This Revision: None

Latest Revision: 6a15e9afbf590b6a4c3d7117

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3
DataMergeOutMux3	0
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	3
SerSelOut3	1
SldoTrimA	8
SldoTrimD	5

Parameter

ADCcalPar	-1.0 0.19 10000.0
InjCap	7.5
KSenseInA	21741.467
KSenseInD	21346.243
Name	0x36566
ChipId	14
NfDSLDO	1.257227809340257
NfASLDO	1.2577134791827544
NfACB	1.2565707266121724
VcalPar	15.329 0.203
IrefTrim	14

KSenseShuntA	22363.0
KSenseShuntD	21956.0
KShuntA	1000.507
KShuntD	980.2

PixelConfig

Diff from previous revision None

No diff is present.