20UPGFC0222564 Chip Configuration

Stage: MODULE/POST_PARYLENE_WARM

Branch: cold

Config: 6a15e9abbf590b6a4c3d7107

This Revision: 6a15e9abbf590b6a4c3d7108

Latest Revision: 6a15e9abbf590b6a4c3d7108

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535

EnCoreCol3	63
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	9
SldoTrimD	8

Parameter

ADCcalPar	0.359 0.18 10000.0
InjCap	7.5
KSenseInA	21032.334
KSenseInD	21639.871
Name	0x36564
ChipId	13
NfDSLDO	1.2568891737862922
NfASLDO	1.2575605431597205
NfACB	1.2563749334151553
VcalPar	14.998 0.192
IrefTrim	9

KSenseShuntA	21633.0
KSenseShuntD	22258.0
KShuntA	1002.693
KShuntD	1000.523

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	9
SldoTrimD	8

Parameter

ADCcalPar	0.359 0.18 10000.0
InjCap	7.5
KSenseInA	21032.334
KSenseInD	21639.871
Name	0x36564
ChipId	13
NfDSLDO	1.2568891737862922
NfASLDO	1.2575605431597205
NfACB	1.2563749334151553
VcalPar	14.998 0.192
IrefTrim	9
KSenseShuntA	21633.0
KSenseShuntD	22258.0
KShuntA	1002.693
KShuntD	1000.523