20UPGFC0146778 Chip Configuration

Stage: MODULE/QC_CROSSCHECK

Branch: LP

Config: 6a063ced8a277601d0304450

This Revision: 6a063ced8a277601d0304451

Latest Revision: 6a063ced8a277601d0304451

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	9
SldoTrimD	8

Parameter

ADCcalPar	-1.0 0.186 10000.0
InjCap	7.467
KSenseInA	20937.324
KSenseInD	21842.526
Name	0x23d5a
ChipId	15
NfDSLDO	1.2615459060360286
NfASLDO	1.2619601552238886
NfACB	1.2599174781940963
VcalPar	13.299 0.201
IrefTrim	11

KSenseShuntA	21536.0
KSenseShuntD	22467.0
KShuntA	1010.287
KShuntD	999.658

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	9
SldoTrimD	8

Parameter

ADCcalPar	-1.0 0.186 10000.0
InjCap	7.467
KSenseInA	20937.324
KSenseInD	21842.526
Name	0x23d5a
ChipId	15
NfDSLDO	1.2615459060360286
NfASLDO	1.2619601552238886
NfACB	1.2599174781940963
VcalPar	13.299 0.201
IrefTrim	11
KSenseShuntA	21536.0
KSenseShuntD	22467.0
KShuntA	1010.287
KShuntD	999.658