20UPGFC0146872 Chip Configuration

Stage: MODULE/QC_CROSSCHECK

Branch: LP

Config: 6a063ce18a277601d0304436

This Revision: None

Latest Revision: 6a063ce18a277601d0304437

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	8
SldoTrimD	7

Parameter

ADCcalPar	-1.0 0.193 10000.0
InjCap	7.470000000000001
KSenseInA	21122.849
KSenseInD	21733.592
Name	0x23db8
ChipId	13
NfDSLDO	1.2592217379186676
NfASLDO	1.2590074703830334
NfACB	1.258750349340272
VcalPar	10.771 0.206
IrefTrim	10

KSenseShuntA	21726.0
KSenseShuntD	22355.0
KShuntA	1003.125
KShuntD	999.335

PixelConfig

Diff from previous revision None

No diff is present.