20UPGFC0141722 Chip Configuration

Stage: MODULE/QC_CROSSCHECK

Branch: cold

Config: 6a063b270077847aebf6fd1f

This Revision: 6a063b270077847aebf6fd20

Latest Revision: 6a063b270077847aebf6fd20

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA8
SldoTrimD8

Parameter

ADCcalPar
  • 4.957
  • 0.19
  • 10000.0
InjCap7.686000000000001
KSenseInA21134.913
KSenseInD21446.654
Name0x2299a
ChipId15
NfDSLDO1.2629717939282172
NfASLDO1.2637859969915861
NfACB1.2618576213151855
VcalPar
  • 13.365
  • 0.203
IrefTrim11
KSenseShuntA21739.0
KSenseShuntD22059.0
KShuntA1004.329
KShuntD997.911

PixelConfig

Diff from previous revision None

ITKPIXV2
GlobalConfig
AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA8
SldoTrimD8
Parameter
ADCcalPar
  • 4.957
  • 0.19
  • 10000.0
InjCap7.686000000000001
KSenseInA21134.913
KSenseInD21446.654
Name0x2299a
ChipId15
NfDSLDO1.2629717939282172
NfASLDO1.2637859969915861
NfACB1.2618576213151855
VcalPar
  • 13.365
  • 0.203
IrefTrim11
KSenseShuntA21739.0
KSenseShuntD22059.0
KShuntA1004.329
KShuntD997.911