20UPGFC0141752 Chip Configuration

Stage: MODULE/FINAL_COLD

Branch: LP

Config: 6a04ada08a277601d0304041

This Revision: 6a04ada08a277601d0304042

Latest Revision: 6a04ef315857bb4fa13d5dad

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	10
SldoTrimD	9

Parameter

ADCcalPar	2.549 0.172 10000.0
InjCap	7.569999999999999
KSenseInA	21306.37
KSenseInD	21566.3
Name	0x229b8
ChipId	13
NfDSLDO	1.2625189064151063
NfASLDO	1.2628045926529103
NfACB	1.2611333281617572
VcalPar	11.26 0.184
IrefTrim	6

KSenseShuntA	21915.0
KSenseShuntD	22182.0
KShuntA	986.564
KShuntD	979.735

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	10
SldoTrimD	9

Parameter

ADCcalPar	2.549 0.172 10000.0
InjCap	7.569999999999999
KSenseInA	21306.37
KSenseInD	21566.3
Name	0x229b8
ChipId	13
NfDSLDO	1.2625189064151063
NfASLDO	1.2628045926529103
NfACB	1.2611333281617572
VcalPar	11.26 0.184
IrefTrim	6
KSenseShuntA	21915.0
KSenseShuntD	22182.0
KShuntA	986.564
KShuntD	979.735