20UPGFC0141752 Chip Configuration

Stage: MODULE/FINAL_COLD

Branch: cold

Config: 6a04ad9f8a277601d030403f

This Revision: 6a04e73f0077847aebf6f9a2

Latest Revision: 6a053f3839a710a3bced619c

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA10
SldoTrimD9

Parameter

ADCcalPar
  • 2.549
  • 0.172
  • 10000.0
InjCap7.569999999999999
KSenseInA21306.37
KSenseInD21566.3
Name0x229b8
ChipId13
NfDSLDO1.2625189064151063
NfASLDO1.2628045926529103
NfACB1.2611333281617572
VcalPar
  • 11.26
  • 0.184
IrefTrim6
KSenseShuntA21915.0
KSenseShuntD22182.0
KShuntA986.564
KShuntD979.735

PixelConfig

Diff from previous revision 6a04d3235857bb4fa13d5d65

ITKPIXV2
GlobalConfig
SldoTrimA10
SldoTrimD9
Parameter
ADCcalPar
$insert
    • 0
    • 2.549
    • 1
    • 0.172
$delete
  • 1
  • 0
InjCap7.569999999999999
VcalPar
  • 11.26
  • 0.184