20UPGFC0141718 Chip Configuration

Stage: MODULE/FINAL_WARM

Branch: LP

Config: 6a038d8c8d85d0e79d6cd085

This Revision: None

Latest Revision: 6a03b5e65857bb4fa13d58dd

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	2
DataMergeOutMux1	3
DataMergeOutMux2	0
DataMergeOutMux3	1
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	1
SerSelOut3	3
SldoTrimA	10
SldoTrimD	5

Parameter

ADCcalPar	-1.0 0.191 10000.0
InjCap	7.675
KSenseInA	21426.504
KSenseInD	21754.67
Name	0x22996
ChipId	12
NfDSLDO	1.263503606877059
NfASLDO	1.2638321383837763
NfACB	1.2625180123569077
VcalPar	13.813 0.205
IrefTrim	9

KSenseShuntA	22039.0
KSenseShuntD	22376.0
KShuntA	1013.147
KShuntD	1005.009

PixelConfig

Diff from previous revision None

No diff is present.