20UPGFC0141658 Chip Configuration

Stage: MODULE/FINAL_WARM

Branch: LP

Config: 6a038d705857bb4fa13d5822

This Revision: 6a03be6edc6089db7173b898

Latest Revision: 6a03be6edc6089db7173b898

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	11
SldoTrimD	6

Parameter

ADCcalPar	2.209 0.19 10000.0
InjCap	7.483999999999999
KSenseInA	21234.241
KSenseInD	21448.269
Name	0x2295a
ChipId	15
NfDSLDO	1.2618315951311045
NfASLDO	1.2623744044117486
NfACB	1.2610030967553847
VcalPar	12.852 0.203
IrefTrim	7

KSenseShuntA	21841.0
KSenseShuntD	22061.0
KShuntA	1000.542
KShuntD	989.409

PixelConfig

Diff from previous revision 6a038d705857bb4fa13d5823

No diff is present.