20UPGFC0141658 Chip Configuration

Stage: MODULE/QC_CROSSCHECK

Branch: LP

Config: 6a0207920a15099ca79e6ffb

This Revision: 6a0239561f68f7138e53e45b

Latest Revision: 6a0239561f68f7138e53e45b

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA11
SldoTrimD6

Parameter

ADCcalPar
  • 2.209
  • 0.19
  • 10000.0
InjCap7.483999999999999
KSenseInA21234.241
KSenseInD21448.269
Name0x2295a
ChipId15
NfDSLDO1.2618315951311045
NfASLDO1.2623744044117486
NfACB1.2610030967553847
VcalPar
  • 12.852
  • 0.203
IrefTrim7
KSenseShuntA21841.0
KSenseShuntD22061.0
KShuntA1000.542
KShuntD989.409

PixelConfig

Diff from previous revision 6a0207920a15099ca79e6ffc

No diff is present.