20UPGFC0141644 Chip Configuration

Stage: MODULE/QC_CROSSCHECK

Branch: LP

Config: 6a0207820a15099ca79e6fee

This Revision: 6a0239521f68f7138e53e452

Latest Revision: 6a0239521f68f7138e53e452

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3
DataMergeOutMux3	0
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	3
SerSelOut3	1
SldoTrimA	10
SldoTrimD	9

Parameter

ADCcalPar	1.497 0.178 10000.0
InjCap	7.866
KSenseInA	20804.571
KSenseInD	21528.291
Name	0x2294c
ChipId	14
NfDSLDO	1.2621088689608657
NfASLDO	1.2621945751179324
NfACB	1.2608089922453576
VcalPar	14.85 0.19
IrefTrim	4

KSenseShuntA	21399.0
KSenseShuntD	22143.0
KShuntA	993.366
KShuntD	980.215

PixelConfig

Diff from previous revision 6a0207820a15099ca79e6fef

No diff is present.