20UPGFC0141626 Chip Configuration

Stage: MODULE/QC_CROSSCHECK

Branch: LP

Config: 69fe6d6d09f2fa600e72575f

This Revision: 6a0244711f68f7138e53e4ca

Latest Revision: 6a0244711f68f7138e53e4ca

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA12
SldoTrimD9

Parameter

ADCcalPar
  • -1.0
  • 0.191
  • 10000.0
InjCap7.807000000000001
KSenseInA21135.372
KSenseInD21196.858
Name0x2293a
ChipId15
NfDSLDO1.2587948975542955
NfASLDO1.2601661960673591
NfACB1.2580949639382528
VcalPar
  • 16.8
  • 0.206
IrefTrim6
KSenseShuntA21739.0
KSenseShuntD21802.0
KShuntA991.295
KShuntD986.886

PixelConfig

Diff from previous revision 69fe6d6d09f2fa600e725760

No diff is present.