20UPGFC0141610 Chip Configuration

Stage: MODULE/QC_CROSSCHECK

Branch: LP

Config: 69fcc95200edd0f2e3fc3381

This Revision: 69fd4aa11d764442f06c8407

Latest Revision: 6a0245150a15099ca79e70d6

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	10
SldoTrimD	8

Parameter

ADCcalPar	2.065 0.179 10000.0
InjCap	7.715
KSenseInA	20750.446
KSenseInD	21334.037
Name	0x2292a
ChipId	15
NfDSLDO	1.2576176809787354
NfASLDO	1.2588604285423155
NfACB	1.256474924598432
VcalPar	13.307 0.194
IrefTrim	9

KSenseShuntA	21343.0
KSenseShuntD	21944.0
KShuntA	986.89
KShuntD	994.273

PixelConfig

Diff from previous revision 69fcc95200edd0f2e3fc3382

No diff is present.