20UPGFC0141702 Chip Configuration

Stage: MODULE/FINAL_COLD

Branch: cold

Config: 69fa66b21d764442f06c7e24

This Revision: 69fb94e38755b2a00d765839

Latest Revision: 69fba20fff6d9b9202e47c01

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux02
DataMergeOutMux13
DataMergeOutMux20
DataMergeOutMux31
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut21
SerSelOut33
SldoTrimA7
SldoTrimD10

Parameter

ADCcalPar
  • 15.0
  • 0.176
  • 10000.0
InjCap7.666000000000001
KSenseInA21177.102
KSenseInD21542.658
Name0x22986
ChipId12
NfDSLDO1.2646320411827396
NfASLDO1.2655747837672322
NfACB1.2632036433274476
VcalPar
  • 14.38
  • 0.189
IrefTrim8
KSenseShuntA21782.0
KSenseShuntD22158.0
KShuntA1004.117
KShuntD992.041

PixelConfig

Diff from previous revision 69fb8b748755b2a00d7657bd

ITKPIXV2
GlobalConfig
SldoTrimA7