20UPGFC0142232 Chip Configuration

Stage: MODULE/POST_PARYLENE_COLD

Branch: cold

Config: 69e2956205af4bf71a63c8ff

This Revision: 69e2956205af4bf71a63c900

Latest Revision: 69e29e8a3d6b6be62a552dfe

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535

EnCoreCol3	63
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3
DataMergeOutMux3	0
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	3
SerSelOut3	1
SldoTrimA	10
SldoTrimD	7

Parameter

ADCcalPar	-1.0 0.188 10000.0
InjCap	7.654
KSenseInA	21221.379
KSenseInD	21313.944
Name	0x22b98
ChipId	14
NfDSLDO	1.2596864131462013
NfASLDO	1.260672027380806
NfACB	1.2591293268396855
VcalPar	14.225 0.201
IrefTrim	15

KSenseShuntA	21828.0
KSenseShuntD	21923.0
KShuntA	990.335
KShuntD	995.261

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3
DataMergeOutMux3	0
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	3
SerSelOut3	1
SldoTrimA	10
SldoTrimD	7

Parameter

ADCcalPar	-1.0 0.188 10000.0
InjCap	7.654
KSenseInA	21221.379
KSenseInD	21313.944
Name	0x22b98
ChipId	14
NfDSLDO	1.2596864131462013
NfASLDO	1.260672027380806
NfACB	1.2591293268396855
VcalPar	14.225 0.201
IrefTrim	15
KSenseShuntA	21828.0
KSenseShuntD	21923.0
KShuntA	990.335
KShuntD	995.261