20UPGFC0142490 Chip Configuration

Stage: MODULE/WIREBOND_PROTECTION

Branch: LP

Config: 69a62dc913dcee0869f48066

This Revision: 69af295d880c6c26ac459a5b

Latest Revision: 69b8a7a22e8b2b5b5ae48532

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux02
DataMergeOutMux13
DataMergeOutMux20
DataMergeOutMux31
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut21
SerSelOut33
SldoTrimA9
SldoTrimD10

Parameter

ADCcalPar
  • 0.815
  • 0.186
  • 10000.0
InjCap7.726999999999999
KSenseInA20954.814
KSenseInD21734.08
Name0x22c9a
ChipId12
NfDSLDO1.258113442582458
NfASLDO1.2585276903892944
NfACB1.2570992496760665
VcalPar
  • 13.358
  • 0.199
IrefTrim10
KSenseShuntA21554.0
KSenseShuntD22355.0
KShuntA1001.803
KShuntD1001.044

PixelConfig

Diff from previous revision 69a8bd378243e9747945114c

No diff is present.