20UPGFC0145302 Chip Configuration

Stage: MODULE/QC_CROSSCHECK

Branch: LP

Config: 693335b92ef46609636b2434

This Revision: 693335b92ef46609636b2435

Latest Revision: 693335b92ef46609636b2435

Global Config

AuroraActiveLanes15
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SldoTrimA10
SldoTrimD10

Parameter

ADCcalPar
  • 4.351
  • 0.184
  • 10000.0
InjCap7.666999999999999
KSenseInA21209.005
KSenseInD21434.575
Name0x23796
ChipId1
NfDSLDO1.2600006669601336
NfASLDO1.260872007080581
NfACB1.25934359080373
VcalPar
  • 13.505
  • 0.197
IrefTrim11
KSenseShuntA21815.0
KSenseShuntD22047.0
KShuntA999.866
KShuntD989.566

PixelConfig

Diff from previous revision None

ITKPIXV2
GlobalConfig
AuroraActiveLanes15
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SldoTrimA10
SldoTrimD10
Parameter
ADCcalPar
  • 4.351
  • 0.184
  • 10000.0
InjCap7.666999999999999
KSenseInA21209.005
KSenseInD21434.575
Name0x23796
ChipId1
NfDSLDO1.2600006669601336
NfASLDO1.260872007080581
NfACB1.25934359080373
VcalPar
  • 13.505
  • 0.197
IrefTrim11
KSenseShuntA21815.0
KSenseShuntD22047.0
KShuntA999.866
KShuntD989.566