20UPGFC0145302 Chip Configuration

Stage: MODULE/QC_CROSSCHECK

Branch: cold

Config: 693335b82ef46609636b2432

This Revision: 693335b82ef46609636b2433

Latest Revision: 693335b82ef46609636b2433

Global Config

AuroraActiveLanes	15
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffPreComp	350
DiffPreampL	900
DiffPreampM	900
DiffPreampR	900
DiffPreampT	900
DiffPreampTL	900
DiffPreampTR	900
DiffVff	150
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	0

DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SldoTrimA	10
SldoTrimD	10

Parameter

ADCcalPar	4.351 0.184 10000.0
InjCap	7.666999999999999
KSenseInA	21209.005
KSenseInD	21434.575
Name	0x23796
ChipId	1
NfDSLDO	1.2600006669601336
NfASLDO	1.260872007080581
NfACB	1.25934359080373
VcalPar	13.505 0.197
IrefTrim	11

KSenseShuntA	21815.0
KSenseShuntD	22047.0
KShuntA	999.866
KShuntD	989.566

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	15
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffPreComp	350
DiffPreampL	900
DiffPreampM	900
DiffPreampR	900
DiffPreampT	900
DiffPreampTL	900
DiffPreampTR	900
DiffVff	150
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SldoTrimA	10
SldoTrimD	10

Parameter

ADCcalPar	4.351 0.184 10000.0
InjCap	7.666999999999999
KSenseInA	21209.005
KSenseInD	21434.575
Name	0x23796
ChipId	1
NfDSLDO	1.2600006669601336
NfASLDO	1.260872007080581
NfACB	1.25934359080373
VcalPar	13.505 0.197
IrefTrim	11
KSenseShuntA	21815.0
KSenseShuntD	22047.0
KShuntA	999.866
KShuntD	989.566