20UPGFC0142183 Chip Configuration

Stage: MODULE/COMPLETE

Branch: LP

Config: 69332364e302e3746ca2cef3

This Revision: 69332364e302e3746ca2cef4

Latest Revision: 69332364e302e3746ca2cef4

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	12
SldoTrimD	12

Parameter

ADCcalPar	1.796 0.181 10000.0
InjCap	7.656999999999999
KSenseInA	21173.08
KSenseInD	21939.898
Name	0x22b67
ChipId	15
NfDSLDO	1.2616878758890537
NfASLDO	1.2626020596592837
NfACB	1.2606594191475444
VcalPar	12.657 0.192
IrefTrim	4

KSenseShuntA	21778.0
KSenseShuntD	22567.0
KShuntA	996.583
KShuntD	1015.407

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	12
SldoTrimD	12

Parameter

ADCcalPar	1.796 0.181 10000.0
InjCap	7.656999999999999
KSenseInA	21173.08
KSenseInD	21939.898
Name	0x22b67
ChipId	15
NfDSLDO	1.2616878758890537
NfASLDO	1.2626020596592837
NfACB	1.2606594191475444
VcalPar	12.657 0.192
IrefTrim	4
KSenseShuntA	21778.0
KSenseShuntD	22567.0
KShuntA	996.583
KShuntD	1015.407