20UPGFC0142280 Chip Configuration

Stage: MODULE/COMPLETE

Branch: LP

Config: 69332363e302e3746ca2ceed

This Revision: 69332363e302e3746ca2ceee

Latest Revision: 69332363e302e3746ca2ceee

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux01
DataMergeOutMux12
DataMergeOutMux23
DataMergeOutMux30
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut23
SerSelOut31
SldoTrimA7
SldoTrimD7

Parameter

ADCcalPar
  • 0.855
  • 0.184
  • 10000.0
InjCap7.883
KSenseInA21075.679
KSenseInD21368.084
Name0x22bc8
ChipId14
NfDSLDO1.2573479855108547
NfASLDO1.2575622501892076
NfACB1.255905270009945
VcalPar
  • 12.61
  • 0.196
IrefTrim10
KSenseShuntA21678.0
KSenseShuntD21979.0
KShuntA988.035
KShuntD981.848

PixelConfig

Diff from previous revision None

ITKPIXV2
GlobalConfig
AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux01
DataMergeOutMux12
DataMergeOutMux23
DataMergeOutMux30
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut23
SerSelOut31
SldoTrimA7
SldoTrimD7
Parameter
ADCcalPar
  • 0.855
  • 0.184
  • 10000.0
InjCap7.883
KSenseInA21075.679
KSenseInD21368.084
Name0x22bc8
ChipId14
NfDSLDO1.2573479855108547
NfASLDO1.2575622501892076
NfACB1.255905270009945
VcalPar
  • 12.61
  • 0.196
IrefTrim10
KSenseShuntA21678.0
KSenseShuntD21979.0
KShuntA988.035
KShuntD981.848