20UPGFC0142213 Chip Configuration

Stage: MODULE/COMPLETE

Branch: LP

Config: 69332362e302e3746ca2cee7

This Revision: 69332362e302e3746ca2cee8

Latest Revision: 69332362e302e3746ca2cee8

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA9
SldoTrimD8

Parameter

ADCcalPar
  • 2.922
  • 0.185
  • 10000.0
InjCap7.593
KSenseInA21188.183
KSenseInD21505.083
Name0x22b85
ChipId13
NfDSLDO1.261273636368168
NfASLDO1.2614307617036762
NfACB1.2602880319908885
VcalPar
  • 14.31
  • 0.199
IrefTrim7
KSenseShuntA21794.0
KSenseShuntD22120.0
KShuntA992.105
KShuntD973.356

PixelConfig

Diff from previous revision None

ITKPIXV2
GlobalConfig
AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA9
SldoTrimD8
Parameter
ADCcalPar
  • 2.922
  • 0.185
  • 10000.0
InjCap7.593
KSenseInA21188.183
KSenseInD21505.083
Name0x22b85
ChipId13
NfDSLDO1.261273636368168
NfASLDO1.2614307617036762
NfACB1.2602880319908885
VcalPar
  • 14.31
  • 0.199
IrefTrim7
KSenseShuntA21794.0
KSenseShuntD22120.0
KShuntA992.105
KShuntD973.356