20UPGFC0145251 Chip Configuration

Stage: MODULE/LONG_TERM_STABILITY_TEST

Branch: LP

Config: 69331ce92ef46609636b2420

This Revision: 69331ce92ef46609636b2421

Latest Revision: 69331ce92ef46609636b2421

Global Config

AuroraActiveLanes	15
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0

DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SldoTrimA	10
SldoTrimD	11

Parameter

ADCcalPar	4.739 0.18 10000.0
InjCap	7.868999999999999
KSenseInA	21367.572
KSenseInD	21487.236
Name	0x23763
ChipId	3
NfDSLDO	1.2620861695435
NfASLDO	1.2628432355497905
NfACB	1.2610434182518167
VcalPar	12.239 0.194
IrefTrim	8

KSenseShuntA	21978.0
KSenseShuntD	22101.0
KShuntA	994.614
KShuntD	996.745

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	15
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SldoTrimA	10
SldoTrimD	11

Parameter

ADCcalPar	4.739 0.18 10000.0
InjCap	7.868999999999999
KSenseInA	21367.572
KSenseInD	21487.236
Name	0x23763
ChipId	3
NfDSLDO	1.2620861695435
NfASLDO	1.2628432355497905
NfACB	1.2610434182518167
VcalPar	12.239 0.194
IrefTrim	8
KSenseShuntA	21978.0
KSenseShuntD	22101.0
KShuntA	994.614
KShuntD	996.745