20UPGFC0141723 Chip Configuration

Stage: MODULE/QC_CROSSCHECK

Branch: LP

Config: 692781f14186f2811c160439

This Revision: 692781f14186f2811c16043a

Latest Revision: 692781f14186f2811c16043a

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3
DataMergeOutMux3	0
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	3
SerSelOut3	1
SldoTrimA	11
SldoTrimD	6

Parameter

ADCcalPar	3.607 0.19 10000.0
InjCap	7.526999999999999
KSenseInA	20919.766
KSenseInD	21478.901
Name	0x2299b
ChipId	14
NfDSLDO	1.263388600699268
NfASLDO	1.2634885918825447
NfACB	1.2615601904907825
VcalPar	12.366 0.204
IrefTrim	5

KSenseShuntA	21517.0
KSenseShuntD	22093.0
KShuntA	985.872
KShuntD	985.563

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3
DataMergeOutMux3	0
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	3
SerSelOut3	1
SldoTrimA	11
SldoTrimD	6

Parameter

ADCcalPar	3.607 0.19 10000.0
InjCap	7.526999999999999
KSenseInA	20919.766
KSenseInD	21478.901
Name	0x2299b
ChipId	14
NfDSLDO	1.263388600699268
NfASLDO	1.2634885918825447
NfACB	1.2615601904907825
VcalPar	12.366 0.204
IrefTrim	5
KSenseShuntA	21517.0
KSenseShuntD	22093.0
KShuntA	985.872
KShuntD	985.563