20UPGFC0083160 Chip Configuration

Stage: MODULE/WIREBONDING

Branch: LP

Config: 69277b014186f2811c1603f1

This Revision: None

Latest Revision: 69277b174186f2811c1603f8

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	9
SldoTrimD	6

Parameter

ADCcalPar	11.54 0.184 10000.0
InjCap	7.832
KSenseInA	21464.002
KSenseInD	21714.962
Name	0x144d8
ChipId	15
NfDSLDO	1.2888550395992657
NfASLDO	1.2875783774008869
NfACB	1.2857996570346062
VcalPar	3.612 0.198
IrefTrim	11

KSenseShuntA	22077.0
KSenseShuntD	22335.0
KShuntA	1069.483
KShuntD	1033.924

PixelConfig

Diff from previous revision None

No diff is present.