20UPGFC0142508 Chip Configuration

Stage: MODULE/POST_PARYLENE_WARM

Branch: LP

Config: 68db089dfc2f5b6275d41c91

This Revision: 68db089dfc2f5b6275d41c92

Latest Revision: 6920d5b7948273b4430bad61

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	8
SldoTrimD	6

Parameter

ADCcalPar	0.406 0.189 10000.0
InjCap	7.866999999999999
KSenseInA	21419.753
KSenseInD	21872.874
Name	0x22cac
ChipId	15
NfDSLDO	1.257070680861802
NfASLDO	1.2573563690044474
NfACB	1.2559564971054844
VcalPar	11.428 0.2
IrefTrim	5

KSenseShuntA	22032.0
KSenseShuntD	22498.0
KShuntA	997.398
KShuntD	986.345

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	8
SldoTrimD	6

Parameter

ADCcalPar	0.406 0.189 10000.0
InjCap	7.866999999999999
KSenseInA	21419.753
KSenseInD	21872.874
Name	0x22cac
ChipId	15
NfDSLDO	1.257070680861802
NfASLDO	1.2573563690044474
NfACB	1.2559564971054844
VcalPar	11.428 0.2
IrefTrim	5
KSenseShuntA	22032.0
KSenseShuntD	22498.0
KShuntA	997.398
KShuntD	986.345