20UPGFC0142187 Chip Configuration

Stage: MODULE/POST_PARYLENE_WARM

Branch: LP

Config: 68dafbaefc2f5b6275d41b47

This Revision: 68dafbaefc2f5b6275d41b48

Latest Revision: 68dafbccfc2f5b6275d41b76

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	8
SldoTrimD	8

Parameter

ADCcalPar	-1.0 0.188 10000.0
InjCap	7.511000000000001
KSenseInA	21090.727
KSenseInD	21837.07
Name	0x22b6b
ChipId	13
NfDSLDO	1.2609518358404688
NfASLDO	1.2616232007374892
NfACB	1.2601090586293147
VcalPar	13.839 0.201
IrefTrim	10

KSenseShuntA	21693.0
KSenseShuntD	22461.0
KShuntA	993.981
KShuntD	981.592

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	8
SldoTrimD	8

Parameter

ADCcalPar	-1.0 0.188 10000.0
InjCap	7.511000000000001
KSenseInA	21090.727
KSenseInD	21837.07
Name	0x22b6b
ChipId	13
NfDSLDO	1.2609518358404688
NfASLDO	1.2616232007374892
NfACB	1.2601090586293147
VcalPar	13.839 0.201
IrefTrim	10
KSenseShuntA	21693.0
KSenseShuntD	22461.0
KShuntA	993.981
KShuntD	981.592