20UPGFC0142553 Chip Configuration

Stage: MODULE/POST_PARYLENE_WARM

Branch: cold

Config: 68dafbad5dcff4364d6a2afd

This Revision: 68dafbad5dcff4364d6a2afe

Latest Revision: 68dafbad5dcff4364d6a2afe

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535

EnCoreCol3	63
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	9
SldoTrimD	7

Parameter

ADCcalPar	-1.0 0.187 10000.0
InjCap	7.8919999999999995
KSenseInA	21351.636
KSenseInD	21315.085
Name	0x22cd9
ChipId	13
NfDSLDO	1.2549280197919603
NfASLDO	1.256042203548278
NfACB	1.2545423407993885
VcalPar	15.068 0.2
IrefTrim	10

KSenseShuntA	21962.0
KSenseShuntD	21924.0
KShuntA	1005.447
KShuntD	999.822

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	9
SldoTrimD	7

Parameter

ADCcalPar	-1.0 0.187 10000.0
InjCap	7.8919999999999995
KSenseInA	21351.636
KSenseInD	21315.085
Name	0x22cd9
ChipId	13
NfDSLDO	1.2549280197919603
NfASLDO	1.256042203548278
NfACB	1.2545423407993885
VcalPar	15.068 0.2
IrefTrim	10
KSenseShuntA	21962.0
KSenseShuntD	21924.0
KShuntA	1005.447
KShuntD	999.822