20UPGFC0142280 Chip Configuration

Stage: MODULE/POST_PARYLENE_WARM

Branch: warm

Config: 68dafba24a9a21e631a04509

This Revision: 68dafba24a9a21e631a0450a

Latest Revision: 68dafba64a9a21e631a0451b

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535

EnCoreCol3	63
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3
DataMergeOutMux3	0
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	3
SerSelOut3	1
SldoTrimA	6
SldoTrimD	7

Parameter

ADCcalPar	12.0 0.185 10000.0
InjCap	7.02
KSenseInA	21075.679
KSenseInD	21368.084
Name	0x22bc8
ChipId	14
NfDSLDO	1.2573479855108547
NfASLDO	1.2575622501892076
NfACB	1.255905270009945
VcalPar	-2.0 0.2
IrefTrim	10

KSenseShuntA	21678.0
KSenseShuntD	21979.0
KShuntA	988.035
KShuntD	981.848

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3
DataMergeOutMux3	0
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	3
SerSelOut3	1
SldoTrimA	6
SldoTrimD	7

Parameter

ADCcalPar	12.0 0.185 10000.0
InjCap	7.02
KSenseInA	21075.679
KSenseInD	21368.084
Name	0x22bc8
ChipId	14
NfDSLDO	1.2573479855108547
NfASLDO	1.2575622501892076
NfACB	1.255905270009945
VcalPar	-2.0 0.2
IrefTrim	10
KSenseShuntA	21678.0
KSenseShuntD	21979.0
KShuntA	988.035
KShuntD	981.848