20UPGFC0142232 Chip Configuration

Stage: MODULE/POST_PARYLENE_WARM

Branch: cold

Config: 68daefe44a9a21e631a044d3

This Revision: 68daefe44a9a21e631a044d4

Latest Revision: 68daefe44a9a21e631a044d4

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux01
DataMergeOutMux12
DataMergeOutMux23
DataMergeOutMux30
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut23
SerSelOut31
SldoTrimA10
SldoTrimD7

Parameter

ADCcalPar
  • -1.0
  • 0.188
  • 10000.0
InjCap7.654
KSenseInA21221.379
KSenseInD21313.944
Name0x22b98
ChipId14
NfDSLDO1.2596864131462013
NfASLDO1.260672027380806
NfACB1.2591293268396855
VcalPar
  • 14.225
  • 0.201
IrefTrim15
KSenseShuntA21828.0
KSenseShuntD21923.0
KShuntA990.335
KShuntD995.261

PixelConfig

Diff from previous revision None

ITKPIXV2
GlobalConfig
AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux01
DataMergeOutMux12
DataMergeOutMux23
DataMergeOutMux30
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut23
SerSelOut31
SldoTrimA10
SldoTrimD7
Parameter
ADCcalPar
  • -1.0
  • 0.188
  • 10000.0
InjCap7.654
KSenseInA21221.379
KSenseInD21313.944
Name0x22b98
ChipId14
NfDSLDO1.2596864131462013
NfASLDO1.260672027380806
NfACB1.2591293268396855
VcalPar
  • 14.225
  • 0.201
IrefTrim15
KSenseShuntA21828.0
KSenseShuntD21923.0
KShuntA990.335
KShuntD995.261