20UPGFC0142211 Chip Configuration

Stage: MODULE/POST_PARYLENE_WARM

Branch: cold

Config: 68daefd24a9a21e631a044b9

This Revision: 68daefd24a9a21e631a044ba

Latest Revision: 68daefd24a9a21e631a044ba

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux02
DataMergeOutMux13
DataMergeOutMux20
DataMergeOutMux31
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut21
SerSelOut33
SldoTrimA9
SldoTrimD7

Parameter

ADCcalPar
  • -1.0
  • 0.187
  • 10000.0
InjCap7.965000000000001
KSenseInA21322.421
KSenseInD21502.849
Name0x22b83
ChipId12
NfDSLDO1.2604678455752722
NfASLDO1.260796382558208
NfACB1.259639361009608
VcalPar
  • 13.234
  • 0.2
IrefTrim12
KSenseShuntA21932.0
KSenseShuntD22117.0
KShuntA1024.821
KShuntD983.001

PixelConfig

Diff from previous revision None

ITKPIXV2
GlobalConfig
AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux02
DataMergeOutMux13
DataMergeOutMux20
DataMergeOutMux31
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut21
SerSelOut33
SldoTrimA9
SldoTrimD7
Parameter
ADCcalPar
  • -1.0
  • 0.187
  • 10000.0
InjCap7.965000000000001
KSenseInA21322.421
KSenseInD21502.849
Name0x22b83
ChipId12
NfDSLDO1.2604678455752722
NfASLDO1.260796382558208
NfACB1.259639361009608
VcalPar
  • 13.234
  • 0.2
IrefTrim12
KSenseShuntA21932.0
KSenseShuntD22117.0
KShuntA1024.821
KShuntD983.001