20UPGFC0142140 Chip Configuration

Stage: MODULE/POST_PARYLENE_WARM

Branch: cold

Config: 68a396f8d220797d7931a5b3

This Revision: 68a396f8d220797d7931a5b4

Latest Revision: 68a396f8d220797d7931a5b4

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535

EnCoreCol3	63
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	12
SldoTrimD	9

Parameter

ADCcalPar	1.749 0.179 10000.0
InjCap	7.822
KSenseInA	20952.71
KSenseInD	21321.204
Name	0x22b3c
ChipId	13
NfDSLDO	1.2478429538543507
NfASLDO	1.2487000182822874
NfACB	1.2479857979256737
VcalPar	11.555 0.191
IrefTrim	5

KSenseShuntA	21551.0
KSenseShuntD	21930.0
KShuntA	998.106
KShuntD	977.34

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	12
SldoTrimD	9

Parameter

ADCcalPar	1.749 0.179 10000.0
InjCap	7.822
KSenseInA	20952.71
KSenseInD	21321.204
Name	0x22b3c
ChipId	13
NfDSLDO	1.2478429538543507
NfASLDO	1.2487000182822874
NfACB	1.2479857979256737
VcalPar	11.555 0.191
IrefTrim	5
KSenseShuntA	21551.0
KSenseShuntD	21930.0
KShuntA	998.106
KShuntD	977.34