20UPGFC0156331 Chip Configuration

Stage: MODULE/FINAL_COLD

Branch: LP

Config: 68816ce0e553d4c2d060714e

This Revision: 688290897ba62d491ef9e8d9

Latest Revision: 688290897ba62d491ef9e8d9

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA9
SldoTrimD6

Parameter

ADCcalPar
  • 2.119
  • 0.19
  • 10000.0
Name0x262ab
ChipId15
NfDSLDO1.2568724130850837
NfASLDO1.2575009207129475
NfACB1.2562153369286804
VcalPar
  • 13.74
  • 0.203
IrefTrim13
KSenseInA20787.971
KSenseInD21194.297
KSenseShuntA21381.913028571427
KSenseShuntD21799.848342857138
KShuntA1008.135
KShuntD963.492

PixelConfig

Diff from previous revision 68816e37d6ac5eb3bc67fd23

No diff is present.