20UPGFC0156329 Chip Configuration

Stage: MODULE/FINAL_WARM

Branch: cold

Config: 68815d64697964a0c3814934

This Revision: 68815d64697964a0c3814935

Latest Revision: 68815d6bd6ac5eb3bc67fb62

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffPreComp	350
DiffPreampL	730
DiffPreampM	730
DiffPreampR	730
DiffPreampT	730
DiffPreampTL	730
DiffPreampTR	730
DiffVff	150
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	2

DataMergeOutMux1	3
DataMergeOutMux2	0
DataMergeOutMux3	1
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	1
SerSelOut3	3
SldoTrimA	7
SldoTrimD	10

Parameter

ADCcalPar	-1.0 0.19 10000.0
Name	0x262a9
ChipId	12
NfDSLDO	1.2566909071639059
NfASLDO	1.257333701198965
NfACB	1.2553196132224467
VcalPar	15.308 0.203
IrefTrim	8
KSenseInA	21259.494
KSenseInD	21761.484
KSenseShuntA	21866.90811428571

KSenseShuntD	22383.240685714285
KShuntA	1012.602
KShuntD	990.825

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffPreComp	350
DiffPreampL	730
DiffPreampM	730
DiffPreampR	730
DiffPreampT	730
DiffPreampTL	730
DiffPreampTR	730
DiffVff	150
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	2
DataMergeOutMux1	3
DataMergeOutMux2	0
DataMergeOutMux3	1
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	1
SerSelOut3	3
SldoTrimA	7
SldoTrimD	10

Parameter

ADCcalPar	-1.0 0.19 10000.0
Name	0x262a9
ChipId	12
NfDSLDO	1.2566909071639059
NfASLDO	1.257333701198965
NfACB	1.2553196132224467
VcalPar	15.308 0.203
IrefTrim	8
KSenseInA	21259.494
KSenseInD	21761.484
KSenseShuntA	21866.90811428571
KSenseShuntD	22383.240685714285
KShuntA	1012.602
KShuntD	990.825