20UPGFC0156331 Chip Configuration

Stage: MODULE/POST_PARYLENE_WARM

Branch: cold

Config: 687ec91e71f72ed1ba03b72c

This Revision: 687ec91e71f72ed1ba03b72d

Latest Revision: 687ec91e71f72ed1ba03b72d

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffPreComp	350
DiffPreampL	730
DiffPreampM	730
DiffPreampR	730
DiffPreampT	730
DiffPreampTL	730
DiffPreampTR	730
DiffVff	150
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	0

DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	9
SldoTrimD	6

Parameter

ADCcalPar	2.119 0.19 10000.0
Name	0x262ab
ChipId	15
NfDSLDO	1.2568724130850837
NfASLDO	1.2575009207129475
NfACB	1.2562153369286804
VcalPar	13.74 0.203
IrefTrim	13
KSenseInA	20787.971
KSenseInD	21194.297
KSenseShuntA	21381.913028571427

KSenseShuntD	21799.848342857138
KShuntA	1008.135
KShuntD	963.492

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffPreComp	350
DiffPreampL	730
DiffPreampM	730
DiffPreampR	730
DiffPreampT	730
DiffPreampTL	730
DiffPreampTR	730
DiffVff	150
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	9
SldoTrimD	6

Parameter

ADCcalPar	2.119 0.19 10000.0
Name	0x262ab
ChipId	15
NfDSLDO	1.2568724130850837
NfASLDO	1.2575009207129475
NfACB	1.2562153369286804
VcalPar	13.74 0.203
IrefTrim	13
KSenseInA	20787.971
KSenseInD	21194.297
KSenseShuntA	21381.913028571427
KSenseShuntD	21799.848342857138
KShuntA	1008.135
KShuntD	963.492