20UPGFC0084939 Chip Configuration

Stage: MODULE/FINAL_COLD

Branch: LP

Config: 682cf7552b3b0c6dbcc5ff59

This Revision: 682cf7f42b3b0c6dbcc5ff82

Latest Revision: 68795be494b5d9fc4264a620

Global Config

AuroraActiveLanes	1
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	1
ServiceBlockEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2

DataMergeOutMux3	3
SerEnLane	1
SldoTrimA	9
SldoTrimD	6

Parameter

ADCcalPar	11.802 0.193 10000.0
Name	0x14bcb
ChipId	15
InjCap	7.866
NfDSLDO	1.2920364662642965
NfASLDO	1.2903185230404546
NfACB	1.2882856235589086
VcalPar	2.408 0.206
IrefTrim	15
KSenseInA	21067.71
KSenseInD	21568.754

KSenseShuntA	26083.83142857143
KSenseShuntD	26704.171619047618
KShuntA	1090.309
KShuntD	1082.323

PixelConfig

Diff from previous revision 682cf7552b3b0c6dbcc5ff5a

No diff is present.